Why Atomic has Coherence

 Current atomic instructions have coherence.
They are pseudo-atomic.

This is because they, just as every instruction, is implemented to work inside the cache.

Anything stored in the cache requires coherence because it is stored in multiple locations.

 

The solution is to implement atomic instructions that bypass the cache. The swap must be performed in main memory, or at least uninterrupted in main memory. This is a change even though current caches are write-through. This is because the cache retains results which require invalidation.

This might seem inefficient. However current writes are pass-thru anyway. Also the software avoids repeat reads of shared data, simply because it is subject to change. Software instead works with a snapshot copy. Therefore the entire shared cache can be virtual and pass-thru, eliminating the cache copy.

The swap itself is slower because it must occur in main memory. Non-swap shared data is slower on repeat reads, but they will not exist within a process or JVM. However eliminating coherence enables scalable core processors and no coherence overhead.

 

Therefore no coherence on shared data.

No coherence on private data.

An allocation instruction that differentiates shared data from private data.

The atomic instruction can be implemented as atomic in main memory, rather than in the cache, and therefore without coherence. (execute-through)

Different Algorithms for the Same Problem