Thread safety eliminates Hardware Coherence

 

Software Issue:

Thread safety - "Thread safety is the avoidance of data races—situations in which data are set to either correct or incorrect values, depending upon the order in which multiple threads access and modify the data."

Hardware Issue:

Cache Coherence - "In computer architecture, cache coherence is the uniformity of shared resource data that ends up stored in multiple local caches. When clients in a system maintain caches of a common memory resource, problems may arise with incoherent data, which is particularly the case with CPUs in a multiprocessing system."

The software solution to data races is to create thread-safe programs. This is known as java concurrency. Java concurrency is coded by writing a program that runs as a single process.

Java Concurrency - "Most implementations of the Java virtual machine run as a single process. In the Java programming language, concurrent programming is primarily concerned with threads (also called lightweight processes). Multiple processes can only be realized with multiple JVMs."

The JVM runs threads as a single process. It is a virtual machine that runs one java thread. The java virtual machines do not have coherence, they have java concurrency. We can simply replace JVMs with single process thread-safe core processors. The same algorithm that is used for JVMs can be used to make thread-safe hardware that does not require coherence.

Implementing  the algorithm requires making four changes to current computer architecture.

First - You need an atomic instruction that updates main memory without interruption. Coherence exists because the current pseudo-atomic instruction is performed in the cache.

Second - You need a cache for each core processor.

 

Third - You need to identify memory that is not shared and place it in an exclusive cache.

Fourth - Memory that does not reside in the cache can be safely written to main memory because it has java concurrency. Java concurrency resolves all data race issues with an atomic instruction.  But that instruction is currently pseudo-atomic.

This method of maintaining coherent main memory is slower in only two situations.

1 - The atomic swap must occur in main memory and not in the cache.

2 - Repeat reads of shared data, however java concurrency does not permit this.

The benefit is that the exclusive cache does not require coherence. It also no longer needs to be write-through. In addition writes of shared data do not result in coherence.  However the main benefit is that JVMs work in parallel. Thread-safe computers work in parallel. Just add another core processor.

Different Algorithms for the Same Problem