The Hardware Conundrum

You can have infinite concurrent processes running on a computer.

With JVM, each process could run on its own core.

However hardware has a limitation on the cores.

The limitation is due to cache synchronization which is a binomial algorithm.

Just as JVM requires thread-safe software, the cores could be made thread-safe hardware.

 

Thread-Safe Algorithm:

Thread-Safe requires an update with an uninterruptible instruction and for shared data to be stored in only one place.

 

There is a corollary that is not required for thread-safe, but enhances performance. The software minimizes the amount and duration of locked shared data. 

 

There are two major issues and resolution creates two caches.

1 - Software simply knows what data is shared due to program logic and treats it in a thread-safe manner.

However the hardware has no way of identifying shared data. It is just data. Currently the hardware has no way to identify and minimize the amount of shared data.

2 - Software uses an uninterruptible instruction which is atomic on a multiprocessor.

However the implementation of the atomic instruction requires binomial coherence. The instruction is pseudo-atomic because it is implemented in the cache and the cache requires coherence. It needs to be atomic in main memory, bypassing the cache and avoiding coherence.

Step 1 from a software perspective differs from the hardware step 1 mentioned elsewhere in this blog. 

 

Software Step 1:

Remove the shared cache by making it pass-thru and modifying the atomic swap to be performed in memory. The thread-safe logic still holds and ensures hardware update integrity. There are three types of data and all are protected.

1 - Private data is protected by software logic.

2 - Swap data is protected by the swap instruction.

3 - The remainder of shared data is protected by a combination of the three swap uses: lock, data swap, or pointer swap.

 

Software Step 2:

Create a private cache and modify existing memory allocation instructions to allocate either private memory or shared memory. This can be thought of as a two cache computer. One contains private data that does require coherence or write-thru. The other contains shared data but is virtual and completely pass-through.

Simply stated, this system has a cache that does not require coherence.

Different Algorithms for the Same Problem